A magical world where clever algorithms meet elegant multitasking models!
Suppose you were given the following open-ended problem:
Given an array of n bits , perform a negation operation on each of the bits.
The most obvious brute force approach would be to go from index 0 to index n-1 and invert the ith bit on the way. Well, this works in a clean way and is the simplest formulation which delivers correct results.
Nice! Now suppose you have an array of about a million digits; our algorithm directs us to go through each of the elements serially, one by one, giving each bit a feeling of self-importance! (The CPU dedicates few clock cycles exclusively on accessing, processing and finally writing out the result).
Can we make this faster? Can we use the fact that an operation on the ith bit is independent of the operation on the (i+1)th bit (or any other bit in general)? Of course we can!
Imagine a switchboard with a set of conventional switches which need to be toggled as quickly as possible. We don't have to toggle the switches one at a time. As a matter of fact, multiple volunteers, hands and fingers can be utilized...
Suppose the switchboard is an array upon which operation(s) have to be performed. The analogies we have are:
- Person is analogous to a processor
- Person's hand is analogous to a processor core
- Fingers of a hand are analogous to threads
- Single finger, Single hand : Single processor, Single core, Single software thread
- Multiple fingers, Single hand : Single processor, Single core, Multiple software threads
- Multiple fingers, Both hands : Single processor, Dual core, Multiple software threads
- Call in your friends on a switch switching party! Multiple Processors, Multiple cores, Multiple threads.
Some forward references for the curious readers:
- Hyper-threading can be simulated by imagining an artificial partition within a set of five fingers of a single hand, calling each partition as a virtual core...
- Suppose you invented a new gadget which can be attached to each finger which can toggle n (contiguous) switches at a time, that would be analogous to SIMD style operation(Single/Symmetric Instruction Multiple Data). Note that you need specialized hardware for such operations...
- There might be conflict(s) on who toggles certain switches in the last case, this is what is referred to as a race condition/data race. Race conditions in writing values generally leads to incorrect results.(except for write operations where all the instructions/threads compete to write the same result, as in this switchboard analogy)
While we're working with this analogy, let me bring in some interesting concepts and gotchas in parallel computing at a very abstract level.
Suppose there is a predefined set of rules with which the switches have to be toggled, then parallelism will be constrained. For the time being, let's switch from the switchboard to a piano. Each keystroke of a given note can be viewed as a memory access of a particular address.
The concept of caching can be seen as:
Branch prediction allows for a predictive seeking to a particular key, hoping that it is to be struck according to the score sheet/song being played. If not, then the effort of moving to the keys is wasted, so a repositioning is required. (analogous to a pipeline flush)
Suppose there is a predefined set of rules with which the switches have to be toggled, then parallelism will be constrained. For the time being, let's switch from the switchboard to a piano. Each keystroke of a given note can be viewed as a memory access of a particular address.
The concept of caching can be seen as:
- The repetition of the same note in a given time period : Temporal locality
- The access of notes in the local neighbourhood of a note : Spatial Locality
Branch prediction allows for a predictive seeking to a particular key, hoping that it is to be struck according to the score sheet/song being played. If not, then the effort of moving to the keys is wasted, so a repositioning is required. (analogous to a pipeline flush)
All these possibilities employ "parallelism" in slightly different degree of multiplicity and complexity. The suitable choice depends on the context of usage and availability of corresponding hardware resources. I hope this gave you a fundamental set of simple analogies in parallelism.
Bit (BInary digiT; An oxymoron, isn't it?)
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